Conventionally, a data transmission circuit formed in a semiconductor integrated circuit includes an oscillator, which supplies a base clock; and a phase-lock-loop circuit, which supplies a clock signal in accordance with the base clock, supplied from the oscillator.
A serial interface circuit is designed to transmit a data in accordance with the clock signal, supplied from the phase-lock-loop circuit. The transmission data is affected by a jitter characteristic of the output signal (clock signal), supplied from the phase-lock-loop circuit. If the jitter characteristic of the clock signal is inferior, a transmitted data would have an inferior jitter characteristic as well. As a result, a receiving error may easily occur and transmission efficiency and quality decreased or deteriorated. Further, product quality of a serial interface circuit (data transmission circuit) is decreased or deteriorated; and therefore, the reliability of products is decreased.